106 search results - page 6 / 22 » itc 2003 |
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
Scan-based architectures, though widely used in modern designs, are expensive in power consumption. In this paper, we present a new technique that allows to design power-optimized...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
The interconnection network consumes the majority of die area in an FPGA. Presented is a scalable manufacturing test method for all SRAM-based FPGAs, able to detect multiple inter...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
Defect tolerance will become more important as feature sizes shrink closer to single digit nanometer dimensions. This is true whether the chips are manufactured using topdown meth...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
NPTest CMOS formatter, embedded within the new timing generation IC, can provide formatted levels and internal strobe markers for eight independent pinelectronics channels at up t...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
An in-circuit diagnostic test structure triggered by a light pulse captures logic states on-chip with picosecond timing accuracy, and the results read out via a scan chain thus pr...