71 search results - page 7 / 15 » nocs 2007 |
ETS
2007
IEEE
14 years 1 months ago
2007
IEEE
The paper proposes a new concept of diagnosing faulty links in Network-on-a-Chip (NoC) designs. The method is based on functional fault models and it implements packet address dri...
ITNG
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, we present PRDT(2, 1), a new interconnection network topology for Network-on-chip (NoC) design. PRDT(2,1) features a recursive structure, and has small diameter and...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip (SoC) and multicore ...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes an efficient test methodology to test switches in a Network-on-Chip (NoC) architecture. A switch in an NoC consists of a number of ports and a router. Using th...
ICPP
2007
IEEE
14 years 1 months ago
2007
IEEE
Three-dimensional Network-on-Chip (3-D NoC) is an emerging research topic exploring the network architecture of 3-D ICs that stack several smaller wafers for reducing wire length ...