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DELTA
2008
IEEE
14 years 3 months ago
Testing of a Highly Reconfigurable Processor Core for Dependable Data Streaming Applications
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
Hans G. Kerkhoff, Jarkko J. M. Huijts
ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
14 years 3 months ago
Hermes-GLP: A GALS Network on Chip Router with Power Control Techniques
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
Julian J. H. Pontes, Matheus T. Moreira, Rafael So...
TC
2008
13 years 8 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
MICRO
2008
IEEE
116views Hardware» more  MICRO 2008»
14 years 3 months ago
Power reduction of CMP communication networks via RF-interconnects
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissi...
M.-C. Frank Chang, Jason Cong, Adam Kaplan, Chunyu...
MASCOTS
2008
13 years 10 months ago
On the Stability of Best Effort Flow Control Mechanisms in On-Chip Architectures
In this paper we present a centralized flow control scheme in NoCs in the presence of both elastic and streaming flow traffic paradigms. We model the desired Best Effort (BE) sour...
Mohammad Sadegh Talebi, Ahmad Khonsari