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HPCA
2009
IEEE
16 years 5 months ago
A low-radix and low-diameter 3D interconnection network design
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...
Bo Zhao, Jun Yang 0002, Xiuyi Zhou, Yi Xu, Youtao ...
NOCS
2009
IEEE
15 years 11 months ago
Dynamic packet fragmentation for increased virtual channel utilization in on-chip routers
Conventional packet-switched on-chip routers provide good resource sharing while minimizing latencies through various techniques. A virtual channel (VC) is allocated on a per-pack...
Young Hoon Kang, Taek-Jun Kwon, Jeff Draper
NOCS
2009
IEEE
15 years 11 months ago
Silicon-photonic clos networks for global on-chip communication
Future manycore processors will require energyefficient, high-throughput on-chip networks. Siliconphotonics is a promising new interconnect technology which offers lower power, h...
Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Sco...
NOCS
2009
IEEE
15 years 11 months ago
Static virtual channel allocation in oblivious routing
Most virtual channel routers have multiple virtual channels to mitigate the effects of head-of-line blocking. When there are more flows than virtual channels at a link, packets o...
Keun Sup Shim, Myong Hyon Cho, Michel A. Kinsy, Ti...
AINA
2009
IEEE
15 years 11 months ago
A Communication Model of Broadcast in Wormhole-Routed Networks on-Chip
This paper presents a novel analytical model to compute communication latency of broadcast as the most fundamental collective communication operation. The novelty of the model lie...
Mahmoud Moadeli, Wim Vanderbauwhede