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ISMAR
2007
IEEE
15 years 10 months ago
An Industrial Augmented Reality Solution For Discrepancy Check
Construction companies employ CAD software during the planning phase, but what is finally built often does not match the original plan. The procedure of validating the model is c...
Pierre Georgel, Pierre Schroeder, Selim Benhimane,...
ISPASS
2007
IEEE
15 years 10 months ago
A Comparison of Two Approaches to Parallel Simulation of Multiprocessors
— The design trend towards CMPs has made the simulation of multiprocessor systems a necessity and has also made multiprocessor systems widely available. While a serial multiproce...
Andrew Over, Bill Clarke, Peter E. Strazdins
ISPASS
2007
IEEE
15 years 10 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
ISPASS
2007
IEEE
15 years 10 months ago
Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance
The ongoing trend of increasing computer hardware and software complexity has resulted in the increase in complexity and overheads of cycle-accurate processor system simulation, e...
Seongbeom Kim, Fang Liu, Yan Solihin, Ravi R. Iyer...
ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
15 years 10 months ago
Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis
Clock distribution is one of the key limiting factors in any high speed, sub-100nm VLSI design. Unwanted clock skews, caused by variation effects like manufacturing variations, po...
Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Ch...