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IPPS
1998
IEEE
14 years 2 months ago
Optimizing Data Scheduling on Processor-in-Memory Arrays
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapor...
INFOVIS
1998
IEEE
14 years 2 months ago
Geographic Visualization: Designing Manipulable Maps for Exploring Temporally Varying Georeferenced Statistics
Geographic Visualization, sometimes called cartographic visualization, is a form of information visualization in which principles from cartography, geographic information systems ...
Alan M. MacEachren, Francis P. Boscoe, Daniel Haug...
DPD
1998
141views more  DPD 1998»
13 years 9 months ago
Dynamic Query Operator Scheduling for Wide-Area Remote Access
Distributed databases operating over wide-area networks such as the Internet, must deal with the unpredictable nature of the performance of communication. The response times of acc...
Laurent Amsaleg, Michael J. Franklin, Anthony Toma...
DAC
1998
ACM
14 years 11 months ago
Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
Madhukar R. Korupolu, K. K. Lee, D. F. Wong
ICCAD
1998
IEEE
105views Hardware» more  ICCAD 1998»
14 years 2 months ago
Fanout optimization under a submicron transistor-level delay model
In this paper we present a new fanout optimization algorithm which is particularly suitable for digital circuits designed with submicron CMOS technologies. Restricting the class o...
Pasquale Cocchini, Massoud Pedram, Gianluca Piccin...