Capacitance coupling can have a significant impact on gate delay in today's deep submicron circuits. In this paper we present a static timing analysis tool that calculates th...
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
This paper describes experiences in using an O.O. language (Java) in designing, prototyping and evaluating a CPU manager. QoS Animator facilitates the execution of object oriented...
Abstract. This paper presents a framework that enables autonomous agents to dynamically select the mechanism they employ in order to coordinate their inter-related activities. Adop...
Rachel A. Bourne, Cora B. Excelente-Toledo, Nichol...
Abstract. We consider various extensions and modifications of Shannon's General Purpose Analog Computer, which is a model of computation by differential equations in continuou...