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VTS
2005
IEEE
14 years 4 months ago
2005
IEEE
TARO test patterns are transition fault test patterns that sensitize each transition fault to all of the outputs that can be reached from the fault location. We were not able to i...
VTS
2005
IEEE
14 years 4 months ago
2005
IEEE
The power supply transient signal (IDDT) method that we propose for defect detection analyze regional signal variations introduced by defects at a set of power supply pads on the ...
VTS
2005
IEEE
14 years 4 months ago
2005
IEEE
† In digital radio applications, error-vector-magnitude (EVM) is the primary specification which quantifies the performance of digital modulation implemented in silicon. Producti...
VTS
2005
IEEE
14 years 4 months ago
2005
IEEE
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...
VTS
2005
IEEE
14 years 4 months ago
2005
IEEE
Nanometer circuits are highly susceptible to soft errors generated by alpha-particle or atmospheric neutron strikes to circuit nodes. The reasons for the high susceptibility are t...