- This paper presents the use of a Markov-based model for analyzing iterative design processes. Techniques are developed for collecting process metadata and calibrating the model. ...
Eric W. Johnson, Luis A. Castillo, Jay B. Brockman
Partitioning plays an increasingly important role in the design process of VLSI circuits and systems. There are partitioning to be solved on all levels of abstraction. The rapidly...
Abstract: Introspection, a zero-overhead binding technique during self-diagnosing microarchitecture synthesis is presented. Given a scheduled control data ow graph (CDFG) introspec...
Recent trends in the semiconductor industry have resulted in an increasing demand for low power circuits. POSE is a step in providing the EDA community and academia with an enviro...
The development of new Field-Programmed, MaskProgrammed and Laser-Programmed Gate Array architectures is hampered by the lack of realistic test circuits that exercise both the arc...
Michael D. Hutton, Jerry P. Grossman, Jonathan Ros...
1 Two tutorials are presented introducing the basic syntax and semantics of Awk and Perl. The languages are taught by example, and the same example EDA applications are developed i...
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...