ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
ISCA
2011
IEEE
2011
IEEE
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
13 years 3 months ago
To meet the demand for more powerful high-performance shared-memory servers, multiprocessor systems must incorporate efficient and scalable cache coherence protocols, such as thos...
ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
Much of the success of the Internet services model can be attributed to the popularity of a class of workloads that we call Online Data-Intensive (OLDI) services. These workloads ...
ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
Chip multiprocessors (CMPs) share a large portion of the memory subsystem among multiple cores. Recent proposals have addressed high-performance and fair management of these share...
ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
Due to shrinking feature sizes processors are becoming more vulnerable to soft errors. Write-back caches are particularly vulnerable since they hold dirty data that do not exist i...
ISCA
2011
IEEE
13 years 3 months ago
2011
IEEE
Blocked-execution multiprocessor architectures continuously run atomic blocks of instructions — also called Chunks. Such architectures can boost both performance and software pr...