Sciweavers

GLVLSI
1998
IEEE
105views VLSI» more  GLVLSI 1998»
13 years 11 months ago
Modeling of Shift Register-based ATM Switch
Sandeep Agarwal, Fayez El Guibaly
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
13 years 11 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
FCCM
1998
IEEE
111views VLSI» more  FCCM 1998»
13 years 11 months ago
A Stream-Based Configurable Computing Radio Testbed
Software radios have emerged as important tools in the development of new signal processing algorithms, networking protocols, and propagation experiments in wireless environments....
Steven Swanchara, Scott J. Harper, Peter M. Athana...
FCCM
1998
IEEE
169views VLSI» more  FCCM 1998»
13 years 11 months ago
Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application
Abstract Image processing, specifically Automatic Target Recognition (ATR) in Synthetic Aperture Radar (SAR) imagery, is an application area that can require tremendous processing ...
Ruth Sivilotti, Young Cho, Wen-King Su, Danny Cohe...
FCCM
1998
IEEE
113views VLSI» more  FCCM 1998»
13 years 11 months ago
Automating Production of Run-Time Reconfigurable Designs
Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung
FCCM
1998
IEEE
115views VLSI» more  FCCM 1998»
13 years 11 months ago
Analysis of the XC6000 Architecture for Embedded System Design
Karlheinz Weiß, Ronny Kistner, Arno Kunzmann...
FCCM
1998
IEEE
99views VLSI» more  FCCM 1998»
13 years 11 months ago
FPGA-Based Architecture Evaluation of Cryptographic Coprocessors for Smartcards
In 1996, about 600 million IC-cards were manufactured worldwide. Due to very small die sizes (max. 25 mm2 ) smartcards encounter more severe restrictions than conventional coproces...
Hagen Ploog, Dirk Timmermann
FCCM
1998
IEEE
113views VLSI» more  FCCM 1998»
13 years 11 months ago
PAM-Blox: High Performance FPGA Design for Adaptive Computing
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...
Oskar Mencer, Martin Morf, Michael J. Flynn
FCCM
1998
IEEE
170views VLSI» more  FCCM 1998»
13 years 11 months ago
Characterization and Parameterization of a Pipeline Reconfigurable FPGA
ended abstract defines a class of architectures for pipeline reconfigurable FPGAs by parameterizing a generic model. This class of architectures is sufficiently general to allow e...
Matthew Moe, Herman Schmit, Seth Copen Goldstein