We introduce in this paper new communication and synchronization constructs which allow deterministic processes, communicating asynchronously via unbounded FIFO bu ers, to cope wi...
In this paper, we study optimal bu er design in high-performance VLSI systems. Speci cally, we design a bu er for a given load such that chip area and power dissipation are minima...
We propose a
ow-control scheme that combines the merits of credit- and rate-based
ow-control schemes by applying direct control over both bandwidth and buer resources. The goal...
Current high-speed packet switching systems, ATM in particular, have large port buering requirements. The use of highly integrated ASIC technology for implementing high-degree an...
As main memory capacity increases, more of the database read requests will be satis ed from the bu er system. Consequently, the amount of disk write operations relative to disk re...
The ATM Guaranteed Frame Rate GFR service is intended for best e ort tra c that can bene t from minimum throughput guarantees. Edge devices connecting LANs to an ATM network can u...
Rohit Goyal, Raj Jain, Sonia Fahmy, Bobby Vandalor...
We study the performance of TCP in an internetwork consisting of both rate-controlled and non-rate-controlled segments. A commonexample of such an environment occurs when the end ...
Lampros Kalampoukas, Anujan Varma, K. K. Ramakrish...
We propose a new compression algorithm that is tailored to database applications. It can be applied to a collection of records, and is especially e ective for records with many lo...
In this paper we present a new fanout optimization algorithm which is particularly suitable for digital circuits designed with submicron CMOS technologies. Restricting the class o...
A fully adaptive router with hybrid bu ers at the input and output channels was designed, which improves the throughput of its input bu er counterpart by up to 40% and has only 10%...