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    DAC
    1997
    ACM
    103views Computer Architecture» more  DAC 1997»
    Quadratic Placement Revisited
    13 years 11 months ago
    Quadratic Placement Revisited
    Download  vlsicad.ucsd.edu
    The “quadratic placement” methodology is rooted in [6] [14] [16] and is reputedly used in many commercial and in-house tools for placement of standard-cell and gate-array desi...
    Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huan...
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    DAC
    1997
    ACM
    160views Computer Architecture» more  DAC 1997»
    Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
    13 years 11 months ago
    Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
    Download  www.cecs.uci.edu
    The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
    Marleen Adé, Rudy Lauwereins, J. A. Peperst...
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    DAC
    1998
    ACM
    156views Computer Architecture» more  DAC 1998»
    Global Routing with Crosstalk Constraints
    13 years 11 months ago
    Global Routing with Crosstalk Constraints
    Download  www.eecs.northwestern.edu
    —Due to the scaling down of device geometry and increasing of frequency in deep submicron designs, crosstalk between interconnection wires has become an important issue in very l...
    Hai Zhou, D. F. Wong
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    DAC
    1998
    ACM
    132views Computer Architecture» more  DAC 1998»
    Design Methodology of Ultra Low-Power MPEG4 Codec Core Exploiting Voltage Scaling Techniques
    13 years 11 months ago
    Design Methodology of Ultra Low-Power MPEG4 Codec Core Exploiting Voltage Scaling Techniques
    Download  www.kuroda.elec.keio.ac.jp
    Kimiyoshi Usami, Mutsunori Igarashi, Takashi Ishik...
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    DAC
    1998
    ACM
    157views Computer Architecture» more  DAC 1998»
    Adjoint Transient Sensitivity Computation in Piecewise Linear Simulation
    13 years 11 months ago
    Adjoint Transient Sensitivity Computation in Piecewise Linear Simulation
    Download  www.cs.york.ac.uk
    This paper presents a general method for computing transient sensitivities using the adjoint method in event driven simulation algorithms that employ piecewise linear device model...
    Tuyen V. Nguyen, Anirudh Devgan, Ognen J. Nastov
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    DAC
    1998
    ACM
    117views Computer Architecture» more  DAC 1998»
    Finite State Machine Decomposition For Low Power
    13 years 11 months ago
    Finite State Machine Decomposition For Low Power
    Download  www.cs.york.ac.uk
    José C. Monteiro, Arlindo L. Oliveira
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    DAC
    1998
    ACM
    119views Computer Architecture» more  DAC 1998»
    A Top-Down Design Environment for Developing Pipelined Datapaths
    13 years 11 months ago
    A Top-Down Design Environment for Developing Pipelined Datapaths
    Download  www.cs.york.ac.uk
    Robert M. McGraw, James H. Aylor, Robert H. Klenke
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    DAC
    1998
    ACM
    292views Computer Architecture» more  DAC 1998»
    Extending Moment Computation to 2-Port Circuit Representations
    13 years 11 months ago
    Extending Moment Computation to 2-Port Circuit Representations
    Download  www.cecs.uci.edu
    Fang-Jou Liu, Chung-Kuan Cheng
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    DAC
    1998
    ACM
    178views Computer Architecture» more  DAC 1998»
    Rate Optimal VLSI Design from Data Flow Graph
    13 years 11 months ago
    Rate Optimal VLSI Design from Data Flow Graph
    Download  peace.snu.ac.kr
    This paper considers the rate optimal VLSI design of a recursive data flow graph (DFG). Previous research on rate optimal scheduling is not directly applicable to VLSI design. We ...
    Moonwook Oh, Soonhoi Ha
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    DAC
    1998
    ACM
    131views Computer Architecture» more  DAC 1998»
    Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
    13 years 11 months ago
    Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
    Download  www.cs.york.ac.uk
    We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
    Ganesh Lakshminarayana, Niraj K. Jha
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