Sciweavers

DAC
1998
ACM
13 years 11 months ago
Design and Analysis of Power Distribution Networks in PowerPC Microprocessors
We present a methodology for the design and analysis of power grids in the PowerPC™ microprocessors. The methodology covers the need for power grid analysis across all stages of...
Abhijit Dharchoudhury, Rajendran Panda, David Blaa...
DAC
1998
ACM
13 years 11 months ago
Efficient Analog Test Methodology Based on Adaptive Algorithms
This papers describes a new, fast and economical methodology to test linear analog circuits based on adaptive algorithms. To the authors knowledge, this is the first time such tec...
Luigi Carro, Marcelo Negreiros
DAC
1998
ACM
13 years 11 months ago
Hybrid Verification Using Saturated Simulation
Adnan Aziz, James H. Kukula, Thomas R. Shiple
DAC
1998
ACM
13 years 11 months ago
Technology Mapping for Large Complex PLDs
Jason Helge Anderson, Stephen Dean Brown
DAC
1999
ACM
13 years 11 months ago
A Framework for Collaborative and Distributed Web-Based Design
The increasing complexity and geographical separation of design data, tools and teams has created a need for a collaborative and distributed design environment. In this paper we p...
Gangadhar Konduri, Anantha Chandrakasan
DAC
1999
ACM
13 years 11 months ago
Exact Memory Size Estimation for Array Computations without Loop Unrolling
This paper presents a new algorithm for exact estimation of the minimum memory size required by programs dealing with array computations. Memory size is an important factor a ecti...
Ying Zhao, Sharad Malik
DAC
1999
ACM
13 years 11 months ago
Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design
As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
Joon-Seo Yim, Chong-Min Kyung
DAC
1999
ACM
13 years 11 months ago
A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs
In deep submicron technology, IR-drop and clock skew issues become more crucial to the functionality of chip. This paper presents a oorplan-based power and clock distribution meth...
Joon-Seo Yim, Seong-Ok Bae, Chong-Min Kyung
DAC
1999
ACM
13 years 11 months ago
Application of High Level Interface-Based Design to Telecommunications System Hardware
The assumption in moving system modelling to higher levels is that this improves the design process by allowing exploration of the architecture, providing an unambiguous specifica...
Dyson Wilkes, M. M. Kamal Hashmi