Sciweavers

HPCA
2002
IEEE
14 years 7 months ago
CableS: Thread Control and Memory Management Extensions for Shared Virtual Memory Clusters
Clusters of high-end workstations and PCs are currently used in many application domains to perform large-scale computations or as scalable servers for I/O bound tasks. Although c...
Peter Jamieson, Angelos Bilas
HPCA
2002
IEEE
14 years 7 months ago
Evaluation of a Multithreaded Architecture for Cellular Computing
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
Calin Cascaval, José G. Castaños, Lu...
HPCA
2002
IEEE
14 years 7 months ago
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach
Power dissipation has become one of the most critical factors for the continued development of both high-end and low-end computer systems. The successful design and evaluation of ...
Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary J...
HPCA
2002
IEEE
14 years 7 months ago
Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation
As the power consumption of modern highperformance microprocessors increases beyond 100W, power becomes an increasingly important design consideration. This paper presents a novel...
Ed Grochowski, David Ayers, Vivek Tiwari
HPCA
2002
IEEE
14 years 7 months ago
Loose Loops Sink Chips
This paper explores the concept of micro-architectural loops and discusses their impact on processor pipelines. In particular, we establish the relationship between loose loops an...
Eric Borch, Eric Tune, Srilatha Manne, Joel S. Eme...
HPCA
2003
IEEE
14 years 7 months ago
A Statistically Rigorous Approach for Improving Simulation Methodology
Due to cost, time, and flexibility constraints, simulators are often used to explore the design space when developing a new processor architecture, as well as when evaluating the ...
Joshua J. Yi, David J. Lilja, Douglas M. Hawkins
HPCA
2003
IEEE
14 years 7 months ago
Dynamic Optimization of Micro-Operations
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
Brian Slechta, David Crowe, Brian Fahs, Michael Fe...
HPCA
2003
IEEE
14 years 7 months ago
Incorporating Predicate Information into Branch Predictors
Predicated Execution can be used to alleviate the costs associated with frequently mispredicted branches. This is accomplished by trading the cost of a mispredicted branch for exe...
Beth Simon, Brad Calder, Jeanne Ferrante
HPCA
2003
IEEE
14 years 7 months ago
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
Li Shang, Li-Shiuan Peh, Niraj K. Jha