Sciweavers

DAC
1999
ACM
15 years 13 days ago
Customized Instruction-Sets for Embedded Processors
It is generally believed that there will be little more variety in CPU architectures, and thus the design of Instruction-set Architectures (ISAs) will have no role in the future o...
Joseph A. Fisher
DAC
1999
ACM
15 years 13 days ago
Simultaneous Circuit Partitioning/Clustering with Retiming for Performance Optimization
Partitioning and clustering are crucial steps in circuit layout for handling large scale designs enabled by the deep submicron technologies. Retiming is an important sequential lo...
Jason Cong, Honching Li, Chang Wu
DAC
1999
ACM
15 years 13 days ago
Robust Rational Function Approximation Algorithm for Model Generation
Carlos P. Coelho, Joel R. Phillips, Luis Miguel Si...
DAC
1999
ACM
15 years 13 days ago
Exploiting Intellectual Properties in ASIP Designs for Embedded DSP Software
Hoon Choi, Ju Hwan Yi, Jong-Yeol Lee, In-Cheol Par...
DAC
1999
ACM
15 years 13 days ago
Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
Chung-Ping Chen, Noel Menezes
DAC
1999
ACM
15 years 13 days ago
Verification of a Microprocessor Using Real World Applications
You-Sung Chang, Seungjong Lee, In-Cheol Park, Chon...
DAC
1999
ACM
15 years 13 days ago
Constraint Management for Collaborative Electronic Design
Juan Antonio Carballo, Stephen W. Director
DAC
1999
ACM
15 years 13 days ago
Hypergraph Partitioning with Fixed Vertices
We empirically assess the implications of fixed terminals for hypergraph partitioning heuristics. Our experimental testbed incorporates a leading-edge multilevel hypergraph partit...
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Marko...
DAC
1999
ACM
15 years 13 days ago
Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting
We illustrate how technical contributions in the VLSI CAD partitioning literature can fail to provide one or more of: (i) reproducible results and descriptions, (ii) an enabling a...
Andrew E. Caldwell, Andrew B. Kahng, Andrew A. Ken...