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    DAC
    1999
    ACM
    128views Computer Architecture» more  DAC 1999»
    A Framework for Collaborative and Distributed Web-Based Design
    14 years 4 months ago
    A Framework for Collaborative and Distributed Web-Based Design
    Download  www.cecs.uci.edu
    The increasing complexity and geographical separation of design data, tools and teams has created a need for a collaborative and distributed design environment. In this paper we p...
    Gangadhar Konduri, Anantha Chandrakasan
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    DAC
    1999
    ACM
    122views Computer Architecture» more  DAC 1999»
    Exact Memory Size Estimation for Array Computations without Loop Unrolling
    14 years 4 months ago
    Exact Memory Size Estimation for Array Computations without Loop Unrolling
    Download  www.cecs.uci.edu
    This paper presents a new algorithm for exact estimation of the minimum memory size required by programs dealing with array computations. Memory size is an important factor a ecti...
    Ying Zhao, Sharad Malik
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    DAC
    1999
    ACM
    278views Computer Architecture» more  DAC 1999»
    Hardware Compilation for FPGA-Based Configurable Computing Machines
    14 years 4 months ago
    Hardware Compilation for FPGA-Based Configurable Computing Machines
    Download  www.cecs.uci.edu
    Xiaohan Zhu, Bill Lin
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    DAC
    1999
    ACM
    129views Computer Architecture» more  DAC 1999»
    Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design
    14 years 4 months ago
    Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design
    Download  www.cecs.uci.edu
    As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
    Joon-Seo Yim, Chong-Min Kyung
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    DAC
    1999
    ACM
    185views Computer Architecture» more  DAC 1999»
    A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs
    14 years 4 months ago
    A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs
    Download  www.cecs.uci.edu
    In deep submicron technology, IR-drop and clock skew issues become more crucial to the functionality of chip. This paper presents a oorplan-based power and clock distribution meth...
    Joon-Seo Yim, Seong-Ok Bae, Chong-Min Kyung
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    DAC
    1999
    ACM
    130views Computer Architecture» more  DAC 1999»
    Application of High Level Interface-Based Design to Telecommunications System Hardware
    14 years 4 months ago
    Application of High Level Interface-Based Design to Telecommunications System Hardware
    Download  www.cs.york.ac.uk
    The assumption in moving system modelling to higher levels is that this improves the design process by allowing exploration of the architecture, providing an unambiguous specifica...
    Dyson Wilkes, M. M. Kamal Hashmi
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    DAC
    1999
    ACM
    179views Computer Architecture» more  DAC 1999»
    Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
    14 years 4 months ago
    Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
    Download  www.cecs.uci.edu
    Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
    Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye,...
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    DAC
    1999
    ACM
    165views Computer Architecture» more  DAC 1999»
    Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor
    14 years 4 months ago
    Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor
    Download  www.cecs.uci.edu
    As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious proble...
    Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. ...
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    DAC
    1999
    ACM
    149views Computer Architecture» more  DAC 1999»
    Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply Voltages
    14 years 4 months ago
    Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply Voltages
    Download  www.cecs.uci.edu
    Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
    Vijay Sundararajan, Keshab K. Parhi
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    DAC
    1999
    ACM
    139views Computer Architecture» more  DAC 1999»
    Stand-by Power Minimization Through Simultaneous Threshold Voltage Selection and Circuit Sizing
    14 years 4 months ago
    Stand-by Power Minimization Through Simultaneous Threshold Voltage Selection and Circuit Sizing
    Download  www.cecs.uci.edu
    We present a new approach for estimation and optimization of the average stand-by power dissipation in large MOS digital circuits. To overcome the complexity of state dependence i...
    Supamas Sirichotiyakul, Tim Edwards, Chanhee Oh, J...
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