Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
This panel discusses the following topics. With the ongoing trend towards more and more digitization in applications ranging from multimedia to telecommunications, there is a big ...
Shekhar Y. Borkar, Robert W. Brodersen, Jue-Hsien ...
This paper presents nano-scale CMOS outlook, discusses the three tenets that have made electronics successful in the past, and using these tenets conclude that there is nothing on...
Silicon design implementation has become increasingly complex with the deep submicron technologies such as 90nm and below. It is common to see multiple processor cores, several ty...
duce system weight and volume, increase operating lifetime, The recent explosion in capability of embedded and portable decrease maintenance costs, and open new frontiers for inele...
In this paper we present a Design-for-Debug (DFD) reconfigurable infrastructure for SoCs to support at-speed in-system functional debug. A distributed reconfigurable fabric insert...
Miron Abramovici, Paul Bradley, Kumar N. Dwarakana...
This paper presents analysis methods for energy estimation in RC trees driven by time-varying voltage sources, e.g., buffers, timevarying power supplies, and resonant clock genera...