DAC
2006
ACM
15 years 12 days ago
2006
ACM
Multimedia applications usually have throughput constraints. An implementation must meet these constraints, while it minimizes resource usage and energy consumption. The compute i...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vul...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
Packet editing is a fundamental building block of data communication systems such as switches and routers. Circuits that implement this function are critical and define the featur...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
The gain-based technology mapping paradigm has been successfully employed for finding minimum delay and minimum area mappings. However, existing gain-based technology mappers fail...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
Steiner routing is a fundamental yet NP-hard problem in VLSI design and other research fields. In this paper, we propose to model the routing graph by an RC network with routing t...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
In a placed circuit, there are a lot of movable cells that can be flipped to further reduce the total wirelength, without affecting the original placement solution. We aim at solv...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
Highly regular, nanodevice based architectures have been proposed to replace pure CMOS based architectures in the emerging post CMOS era. Since bottom-up self-assembly is used to ...
DAC
2006
ACM
15 years 12 days ago
2006
ACM
In this paper we propose a hybrid FPGA using nanoscale clusters with an architecture similar to clusters of traditional CMOS FPGAs. The proposed cluster is made of a crossbar of n...