Combination of SECDED with a redundancy technique can effectively tolerate a high variation-induced defect rate in future processes. However, while a defective cell in a block can...
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) decoding algorithm is gaining increased attention in communication standards and literatur...
The design of ubiquitous and embedded computers focuses on cost factors such as area, power-consumption, and performance. Security and trust properties, on the other hand, are oft...
1 The increasing test data volume needed to test core-based System-on-Chip contributes to long test application times (TAT) and huge automatic test equipment (ATE) memory requireme...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
As the hardware and software complexity grows, it is unlikely for the power management hardware/software to have a full observation of the entire system status. In this paper, we ...
Design of low-voltage high-resolution MOSFET-only pipeline analog to digital converters (ADCs) has been investigated in this work. The nonlinearity caused by replacing linear MIM ...
This paper presents a built-in self-test (BiST) scheme for analog to digital converters (ADC) based on a linear ramp generator and efficient output analysis. The proposed analysi...