As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify ...
Nicolas Coste, Hubert Garavel, Holger Hermanns, Ri...
This paper presents an integrated approach to energy harvester modelling and performance optimisation where the complete mixed physical-domain energy harvester system (micro gener...
Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashim...
N-detect test has been shown to have a higher likelihood for detecting defects. However, traditional definitions of Ndetect test do not necessarily exploit the localized characte...
Yen-Tzu Lin, Osei Poku, Naresh K. Bhatti, Ronald D...
We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that chec...
Krishnendu Chatterjee, Arkadeb Ghosal, Thomas A. H...
– A new approach for diagnostic analysis of static errors in multi-step ADC based on the steepestdescent method is proposed. To set initial data, estimate the parameter update an...
In the absence of a single module interface standard, integration of pre-designed modules in System-on-Chip design often requires the use of protocol converters. Existing approach...
Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Rames...
— Market and customer demands have continued to push the limits of CMOS performance. At-speed test has become a common method to ensure these high performance chips are being shi...
Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad...