We report the successful application of a resistive bridging fault (RBF) simulator to industrial benchmark circuits. Despite the slowdown due to the consideration of the sophistic...
System-level integration requires an overall understanding of the interplay of the sub-systems to enable componentbased development with portability, reconfigurability and extens...
Harald Heinecke, Werner Damm, Bernhard Josko, Alex...
Fetching instructions from a set-associative cache in an embedded processor can consume a large amount of energy due to the tag checks performed. Recent proposals to address this ...
Timothy M. Jones, Sandro Bartolini, Bruno De Bus, ...
This paper presents a game-theoretic approach to the testing of uncontrollable real-time systems. By modelling the systems with Timed I/O Game Automata and specifying the test pur...
Alexandre David, Kim Guldstrand Larsen, Shuhao Li,...
When a signal traverses on-chip voltage domains, a level shifter is required. Inverters can handle a high to low voltage shift with minimal leakage. For a low to high voltage leve...
Leakage power is a serious concern in nanometer CMOS technologies. In this paper we focus on leakage reduction through automatic insertion of sleep transistors for power gating in...
Ashoka Visweswara Sathanur, Antonio Pullini, Luca ...
Abstract—Wafer-level test during burn-in (WLTBI) has recently emerged as a promising technique to reduce test and burn-in costs in semiconductor manufacturing. However, the testi...
This paper presents an improved hardware structure for the computation of the Whirlpool hash function. By merging the round key computation with the data compression and by using ...
Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Sta...
Accurate power and performance figures are critical to assess the effective design of possible sensor node architectures in Body Area Networks (BANs) since they operate on limite...