Sciweavers

DFT
2005
IEEE
81views VLSI» more  DFT 2005»
14 years 5 months ago
Noise Analysis of Fault Tolerant Active Pixel Sensors
As digital imagers grow in pixel count and area, the ability to correct for pixel defects becomes more important. A fault tolerant Active Pixel Sensor (APS) has previously been de...
Cory Jung, Mohammad Hadi Izadi, Michelle L. La Hay...
DFT
2005
IEEE
103views VLSI» more  DFT 2005»
14 years 5 months ago
Methodologies and Algorithms for Testing Switch-Based NoC Interconnects
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
Cristian Grecu, Partha Pratim Pande, Baosheng Wang...
DFT
2005
IEEE
92views VLSI» more  DFT 2005»
14 years 5 months ago
On the Effect of Stuck-at Faults on Delay-insensitive Nanoscale Circuits
Jia Di, Parag K. Lala, D. P. Vasudevan
DFT
2005
IEEE
90views VLSI» more  DFT 2005»
14 years 5 months ago
On the Modeling and Analysis of Jitter in ATE Using Matlab
This paper presents a new jitter component analysis method for mixed mode VLSI chip testing in Automatic Test Equipment (ATE). The separate components are analyzed individually an...
Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio L...
DFT
2005
IEEE
63views VLSI» more  DFT 2005»
14 years 5 months ago
An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors
Paolo Bernardi, Leticia Maria Veiras Bolzani, Maur...
DFT
2005
IEEE
89views VLSI» more  DFT 2005»
14 years 5 months ago
On-Line Identification of Faults in Fault-Tolerant Imagers
Detection of defective pixels that develop on-line is a vital part of fault tolerant schemes for repairing imagers during operation. This paper presents a new algorithm for the id...
Glenn H. Chapman, Israel Koren, Zahava Koren, Jozs...
DFT
2005
IEEE
178views VLSI» more  DFT 2005»
14 years 5 months ago
Inter-Plane Via Defect Detection Using the Sensor Plane in 3-D Heterogeneous Sensor Systems
Defect and fault tolerance is being studied in a 3D Heterogeneous Sensor using a stacked chip with sensors located on the top plane, and inter-plane vias connecting these to other...
Glenn H. Chapman, Vijay K. Jain, Shekhar Bhansali
DFT
2005
IEEE
72views VLSI» more  DFT 2005»
14 years 5 months ago
Soft Error Modeling and Protection for Sequential Elements
Sequential elements, flip-flops, latches, and memory cells, are the most vulnerable components to soft errors. Since state-of-the-art designs contain millions of bistables, it i...
Hossein Asadi, Mehdi Baradaran Tahoori
DFT
2005
IEEE
126views VLSI» more  DFT 2005»
14 years 5 months ago
Analysis and Testing for Error Tolerant Motion Estimation
We propose a novel system-level error tolerance approach specifically targeted for multimedia compression algorithms. In particular we focus on the motion estimation process perf...
Hyukjune Chung, Antonio Ortega
DFT
2005
IEEE
109views VLSI» more  DFT 2005»
14 years 5 months ago
Hardware Testing For Error Tolerant Multimedia Compression based on Linear Transforms
In this paper, we propose a system-level error tolerance scheme for systems where a linear transform is combined with quantization. These are key components in multimedia compress...
In Suk Chong, Antonio Ortega