APCSAC
2003
IEEE
14 years 5 months ago
2003
IEEE
The RAMpage hierarchy moves main memory up a level to replace the lowest-level cache by an equivalent-sized SRAM main memory, with a TLB caching page translations for that main mem...
MICRO
2006
IEEE
14 years 6 months ago
2006
IEEE
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
ESTIMEDIA
2007
Springer
14 years 6 months ago
2007
Springer
— In computer systems, the storage hierarchy, composed of a disk drive and a DRAM, is responsible for a large portion of the total energy consumed. This work studies the energy m...
QEST
2007
IEEE
14 years 6 months ago
2007
IEEE
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
ISCA
2008
IEEE
14 years 6 months ago
2008
IEEE
In a chip-multiprocessor (CMP) system, the DRAM system is shared among cores. In a shared DRAM system, requests from a thread can not only delay requests from other threads by cau...
SIGMETRICS
2009
ACM
14 years 6 months ago
2009
ACM
Errors in dynamic random access memory (DRAM) are a common form of hardware failure in modern compute clusters. Failures are costly both in terms of hardware replacement costs and...
MICRO
2009
IEEE
14 years 7 months ago
2009
IEEE
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
MICRO
2009
IEEE
14 years 7 months ago
2009
IEEE
DRAM systems achieve high performance when all DRAM banks are busy servicing useful memory requests. The degree to which DRAM banks are busy is called DRAM Bank-Level Parallelism ...
MICRO
2009
IEEE
14 years 7 months ago
2009
IEEE
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
DATE
2009
IEEE
14 years 7 months ago
2009
IEEE
Abstract—Convergence of communication, consumer applications and computing within mobile systems pushes memory requirements both in terms of size, bandwidth and power consumption...