CODES
2007
IEEE
14 years 6 months ago
2007
IEEE
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE
This paper proposes a new link for asynchronous NoC communications that is resilient to transient faults on the wires of the link without impact on the data transfer capability. R...
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE
Open Core Protocol (OCP) is a standard on-chip core interface specification. The current release is flexible and configurable to support the communication needs of a wide range...
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE
This paper presents a system synthesis approach for dependable embedded systems. The proposed approach significantly extends previous work by automatically inserting fault detect...
CODES
2008
IEEE
14 years 6 months ago
2008
IEEE