Sciweavers

DATE
2008
IEEE
157views Hardware» more  DATE 2008»
14 years 3 months ago
Logical Reliability of Interacting Real-Time Tasks
We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that chec...
Krishnendu Chatterjee, Arkadeb Ghosal, Thomas A. H...
DATE
2008
IEEE
104views Hardware» more  DATE 2008»
14 years 3 months ago
Diagnostic Analysis of Static Errors in Multi-Step Analog to Digital Converters
– A new approach for diagnostic analysis of static errors in multi-step ADC based on the steepestdescent method is proposed. To set initial data, estimate the parameter update an...
Amir Zjajo, José Pineda de Gyvez
DATE
2008
IEEE
111views Hardware» more  DATE 2008»
14 years 3 months ago
A Formal Approach To The Protocol Converter Problem
In the absence of a single module interface standard, integration of pre-designed modules in System-on-Chip design often requires the use of protocol converters. Existing approach...
Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Rames...
DATE
2008
IEEE
109views Hardware» more  DATE 2008»
14 years 3 months ago
Layout-Aware, IR-Drop Tolerant Transition Fault Pattern Generation
— Market and customer demands have continued to push the limits of CMOS performance. At-speed test has become a common method to ensure these high performance chips are being shi...
Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad...
DATE
2008
IEEE
134views Hardware» more  DATE 2008»
14 years 3 months ago
Adaptive Filesystem Compression for Embedded Systems
Abstract—Embedded system secondary storage size is often constrained, yet storage demands are growing as a result of increasing application complexity and storage of personal dat...
Lan S. Bai, Haris Lekatsas, Robert P. Dick
DATE
2008
IEEE
122views Hardware» more  DATE 2008»
14 years 3 months ago
Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network
This paper proposes an efficient method to find the worst case of voltage violation by multi-domain clock gating in an on-chip power network. We first present a voltage response i...
Wanping Zhang, Yi Zhu, Wenjian Yu, Ling Zhang, Rui...
DATE
2008
IEEE
79views Hardware» more  DATE 2008»
14 years 3 months ago
System Performance Optimization Methodology for Infineon's 32-Bit Automotive Microcontroller Architecture
Microcontrollers are the core part of automotive Electronic Control Units (ECUs). A significant investment of the ECU manufacturers and even their customers is linked to the speci...
Albrecht Mayer, Frank Hellwig
DATE
2008
IEEE
104views Hardware» more  DATE 2008»
14 years 3 months ago
Multi-Vector Tests: A Path to Perfect Error-Rate Testing
The importance of testing approaches that exploit error tolerance to improve yield has previously been established. Error rate, defined as the percentage of vectors for which the...
Shideh Shahidi, Sandeep Gupta
DATE
2008
IEEE
110views Hardware» more  DATE 2008»
14 years 3 months ago
Run-time System for an Extensible Embedded Processor with Dynamic Instruction Set
One of the upcoming challenges in embedded processing is to incorporate an increasing amount of adaptivity in order to respond to the multifarious constraints induced by today’s...
Lars Bauer, Muhammad Shafique, Stephanie Kreutz, J...
DATE
2008
IEEE
117views Hardware» more  DATE 2008»
14 years 3 months ago
CATCH: A Mechanism for Dynamically Detecting Cache-Content-Duplication and its Application to Instruction Caches
Cache-Content-Duplication (CCD) occurs when there is a miss for a block in a cache and the entire content of the missed block is already in the cache in a block with a different t...
Marios Kleanthous, Yiannakis Sazeides