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ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
14 years 3 months ago
SAT-controlled redundancy addition and removal: a novel circuit restructuring technique
- We proposed a novel Boolean Satisfiability (SAT)-controlled redundancy addition and removal (RAR) algorithm to resolve the performance and quality problems of
Chi-An Wu, Ting-Hao Lin, Shao-Lun Huang, Chung-Yan...
ASPDAC
2009
ACM
102views Hardware» more  ASPDAC 2009»
14 years 3 months ago
Stochastic current prediction enabled frequency actuator for runtime resonance noise reduction
Power delivery network (PDN) is a distributed RLC network with its dominant resonance frequency in the low-to-middle frequency range. Though high-performance chips’ working freq...
Yiyu Shi, Jinjun Xiong, Howard Chen, Lei He
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
14 years 3 months ago
CKVdd: a self-stabilization ramp-vdd technique for dynamic power reduction
Chin-Hsien Wang, Ching-Hwa Cheng, Jiun-In Guo
ASPDAC
2009
ACM
111views Hardware» more  ASPDAC 2009»
14 years 3 months ago
A UML-based approach for heterogeneous IP integration
- With increasing availability of predefined IP (Intellectual Properties) blocks and inexpensive microprocessors, embedded system designers are faced with more design choices than ...
Zhenxin Sun, Weng-Fai Wong
ASPDAC
2009
ACM
255views Hardware» more  ASPDAC 2009»
14 years 3 months ago
A low-power FPGA based on autonomous fine-grain power-gating
— This is the first implementation of an FPGA based on autonomous fine-grain power-gating. To cut the power consumption of clock network and detect the activity of the cell e...
Shota Ishihara, Masanori Hariyama, Michitaka Kamey...
ASPDAC
2009
ACM
91views Hardware» more  ASPDAC 2009»
14 years 3 months ago
Thermal-aware post compilation for VLIW architectures
Wen-Wen Hsieh, TingTing Hwang