MICRO
2008
IEEE
13 years 8 months ago
2008
IEEE
MICRO
2008
IEEE
13 years 8 months ago
2008
IEEE
Dynamically tracking the flow of data within a microprocessor creates many new opportunities to detect and track malicious or erroneous behavior, but these schemes all rely on the...
MICRO
2008
IEEE
13 years 8 months ago
2008
IEEE
MICRO
2008
IEEE
13 years 8 months ago
2008
IEEE
Distributed processors must balance communication and concurrency. When dividing instructions among the processors, key factors are the available concurrency, criticality of depen...
MICRO
2008
IEEE
13 years 8 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
JIPS
2006
13 years 8 months ago
2006
: Large portion of embedded system development process is the integration of hardware and software. Unfortunately, the communication across the hardware/software boundary is tediou...
ISCA
2006
IEEE
13 years 8 months ago
2006
IEEE
This paper describes the tools, techniques, and devices used to design embedded products with system
ISCA
2006
IEEE
13 years 8 months ago
2006
IEEE
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The res...
ISCA
2006
IEEE
13 years 8 months ago
2006
IEEE
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
ISCA
2006
IEEE
13 years 8 months ago
2006
IEEE
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...