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ASPDAC
2001
ACM
57views Hardware» more  ASPDAC 2001»
14 years 9 days ago
Speech recognition chip for monosyllables
Abstract-- In the paper, we present a real-time speech recognition chip for monosyllables such as A, B, ..., etc. The chip recognizes up to 64 monosyllables based on the Hidden Mar...
Kazuhiro Nakamura, Qiang Zhu, Shinji Maruoka, Taka...
ASPDAC
2001
ACM
130views Hardware» more  ASPDAC 2001»
14 years 9 days ago
Area/delay estimation for digital signal processor cores
Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for digital signal processor cores. In hardware/software partitioning, area and...
Yuichiro Miyaoka, Yoshiharu Kataoka, Nozomu Togawa...
ASPDAC
2001
ACM
73views Hardware» more  ASPDAC 2001»
14 years 9 days ago
Timed circuits: a new paradigm for high-speed design
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
Chris J. Myers, Wendy Belluomini, Kip Kallpack, Er...
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
14 years 9 days ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
ASPDAC
2001
ACM
75views Hardware» more  ASPDAC 2001»
14 years 9 days ago
Correlation method of circuit-performance and technology fluctuations for improved design reliability
Abstract-- We propose a method of correlating circuit performance with technology fluctuations during the circuit-design phase. The method employs test circuits sensitive for techn...
D. Miyawaki, Shizunori Matsumoto, Hans Jürgen...
ASPDAC
2001
ACM
81views Hardware» more  ASPDAC 2001»
14 years 9 days ago
High-level specification and efficient implementation of pipelined circuits
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
Maria-Cristina V. Marinescu, Martin C. Rinard
ASPDAC
2001
ACM
137views Hardware» more  ASPDAC 2001»
14 years 9 days ago
Optimized address assignment for DSPs with SIMD memory accesses
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
Markus Lorenz, David Koffmann, Steven Bashford, Ra...
ASPDAC
2001
ACM
75views Hardware» more  ASPDAC 2001»
14 years 9 days ago
Integrated power supply planning and floorplanning
One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply volt...
I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz...
ASPDAC
2001
ACM
159views Hardware» more  ASPDAC 2001»
14 years 9 days ago
Design and implementation of JPEG encoder IP core
Chung-Jr Lian, Liang-Gee Chen, Hao-Chieh Chang, Yu...
ASPDAC
2001
ACM
104views Hardware» more  ASPDAC 2001»
14 years 9 days ago
Optimal spacing and capacitance padding for general clock structures
Clock-tuning has been classified as important but tough tasks due to the non-convex nature caused by the skew requirements. As a result, all existing mathematical programming appr...
Yu-Min Lee, Hing Yin Lai, Charlie Chung-Ping Chen