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DATE
2004
IEEE
168views Hardware» more  DATE 2004»
14 years 12 days ago
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing
Energy efficient embedded systems consist of a heterogeneous collection of very specific building blocks, connected together by a complex network of many dedicated busses and inte...
Ingrid Verbauwhede, Patrick Schaumont, Christian P...
DATE
2004
IEEE
97views Hardware» more  DATE 2004»
14 years 12 days ago
A Formal Verification Methodology for Checking Data Integrity
Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...
Yasushi Umezawa, Takeshi Shimizu
DATE
2004
IEEE
149views Hardware» more  DATE 2004»
14 years 12 days ago
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation
This paper describes a novel design methodology to implement a secure DPA resistant crypto processor. The methodology is suitable for integration in a common automated standard ce...
Kris Tiri, Ingrid Verbauwhede
DATE
2004
IEEE
157views Hardware» more  DATE 2004»
14 years 12 days ago
Hierarchical Modeling and Simulation of Large Analog Circuits
This paper proposes a new hierarchical circuit modeling and simulation technique in s-domain for linear analog circuits. The new algorithm can perform circuit complexity reduction...
Sheldon X.-D. Tan, Zhenyu Qi, Hang Li
DATE
2004
IEEE
156views Hardware» more  DATE 2004»
14 years 12 days ago
Timing Analysis for Preemptive Multi-Tasking Real-Time Systems with Caches
In this paper, we propose an approach to estimate the Worst Case Response Time (WCRT) of tasks in a preemptive multi-tasking single-processor real-time system with a set associati...
Yudong Tan, Vincent John Mooney III
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
14 years 12 days ago
Testing of Quantum Dot Cellular Automata Based Designs
There has been considerable research on quantum dots cellular automata as a new computing scheme in the nano-scale regimes. The basic logic element of this technology is a majorit...
Mehdi Baradaran Tahoori, Fabrizio Lombardi
DATE
2004
IEEE
105views Hardware» more  DATE 2004»
14 years 12 days ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...
DATE
2004
IEEE
173views Hardware» more  DATE 2004»
14 years 12 days ago
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee
DATE
2004
IEEE
164views Hardware» more  DATE 2004»
14 years 12 days ago
System Design Using Kahn Process Networks: The Compaan/Laura Approach
New emerging embedded system platforms in the realm of highthroughput multimedia, imaging, and signal processing will consist of multiple microprocessors and reconfigurable compon...
Todor Stefanov, Claudiu Zissulescu, Alexandru Turj...
DATE
2004
IEEE
125views Hardware» more  DATE 2004»
14 years 12 days ago
Local Decisions and Triggering Mechanisms for Adaptive Fault-Tolerance
Dynamic fault-tolerance management (DFTM) was previously introduced as a means of providing environmentand workload-driven adaptation for failure-prone battery powered systems. Th...
Phillip Stanley-Marbell, Diana Marculescu