Sciweavers

CAV
2006
Springer
105views Hardware» more  CAV 2006»
14 years 12 days ago
FAST Extended Release
Fast is a tool designed for the analysis of counter systems, i.e. automata extended with unbounded integer variables. Despite the reachability set is not recursive in general, Fast...
Sébastien Bardin, Jérôme Lerou...
DATE
2004
IEEE
147views Hardware» more  DATE 2004»
14 years 12 days ago
Formal Refinement and Model Checking of an Echo Cancellation Unit
This article presents an approach, which combines theorem proving-based refinement with model checking for state based real-time systems. Our verification flow starts from UML sta...
Alexander Krupp, Wolfgang Müller 0003, Ian Ol...
CAV
2006
Springer
116views Hardware» more  CAV 2006»
14 years 12 days ago
Lazy Shape Analysis
Abstract. Many software model checkers are based on predicate abstraction. If the verification goal depends on pointer structures, the approach does not work well, because it is di...
Dirk Beyer, Thomas A. Henzinger, Grégory Th...
DATE
2004
IEEE
139views Hardware» more  DATE 2004»
14 years 12 days ago
Efficient Implementations of Mobile Video Computations on Domain-Specific Reconfigurable Arrays
Mobile video processing as defined in standards like MPEG-4 and H.263 contains a number of timeconsuming computations that cannot be efficiently executed on current hardware archi...
Sami Khawam, Sajid Baloch, Arjun Pai, Imran Ahmed,...
DATE
2004
IEEE
125views Hardware» more  DATE 2004»
14 years 12 days ago
Fast Comparisons of Circuit Implementations
Abstract-- Digital designs can be mapped to different implementations using diverse approaches, with varying cost criteria. Post-processing transforms, such as transistor sizing ca...
Shrirang K. Karandikar, Sachin S. Sapatnekar
DATE
2004
IEEE
151views Hardware» more  DATE 2004»
14 years 12 days ago
Boosting: Min-Cut Placement with Improved Signal Delay
In this work we improve top-down min-cut placers in the context of timing closure. Using the concept of boosting factors, we adjust net weights according to net spans, so as to re...
Andrew B. Kahng, Igor L. Markov, Sherief Reda
DATE
2004
IEEE
106views Hardware» more  DATE 2004»
14 years 12 days ago
Realizable Reduction for Electromagnetically Coupled RLMC Interconnects
This paper presents a realizable RLMC1 reduction algorithm for extracted interconnect circuits based on two effective approaches: RL branch reduction and RC/LC node reduction. Our...
Rong Jiang, Charlie Chung-Ping Chen
DATE
2004
IEEE
118views Hardware» more  DATE 2004»
14 years 12 days ago
SCORE: SPICE COmpatible Reluctance Extraction
Presently, a necessary modification to mainstream analysis tools prevents the direct application of reluctance k. In this paper, we propose a reluctance realization algorithm (RRA...
Rong Jiang, Charlie Chung-Ping Chen
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
14 years 12 days ago
Context-Aware Performance Analysis for Efficient Embedded System Design
Performance analysis has many advantages in theory compared to simulation for the validation of complex embedded systems, but is rarely used in practice. To make analysis more att...
Marek Jersak, Rafik Henia, Rolf Ernst
DATE
2004
IEEE
148views Hardware» more  DATE 2004»
14 years 12 days ago
MODD: A New Decision Diagram and Representation for Multiple Output Binary Functions
This paper presents a new decision diagram (DD), called MODD, for multiple output binary and multiple-valued functions. This DD is canonic and can be made minimal with respect to ...
Abusaleh M. Jabir, Dhiraj K. Pradhan