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ASPDAC
2004
ACM
74views Hardware» more  ASPDAC 2004»
14 years 13 days ago
Optimal design of high fan-in multiplexers via mixed-integer nonlinear programming
- In this paper, a novel strategy for designing the heterogeneous-tree multiplexer is proposed. We build the multiplexer delay model by curve fitting and then formulate the heterog...
Hsu-Wei Huang, Cheng-Yeh Wang, Jing-Yang Jou
ASPDAC
2004
ACM
94views Hardware» more  ASPDAC 2004»
14 years 13 days ago
Improving simulation-based verification by means of formal methods
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Görschwin Fey, Rolf Drechsler
ASPDAC
2004
ACM
103views Hardware» more  ASPDAC 2004»
14 years 13 days ago
Design and implementation of a secret key steganographic micro-architecture employing FPGA
In the well-known "prisoners' problem", a representative example of steganography, two persons attempt to communicate covertly without alerting the warden. One appr...
Hala A. Farouk, Magdy Saeb
ASPDAC
2004
ACM
144views Hardware» more  ASPDAC 2004»
14 years 13 days ago
Verification of timed circuits with symbolic delays
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
Robert Clarisó, Jordi Cortadella
ASPDAC
2004
ACM
79views Hardware» more  ASPDAC 2004»
14 years 13 days ago
NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO
Abstract--A parasitic-aware RF synthesis tool based on a nondominated sorting genetic algorithm (NSGA) is introduced. The NSGA-based optimizer casts the design problem as a multi-o...
Min Chu, David J. Allstot, Jeffrey M. Huard, Kim Y...
ASPDAC
2004
ACM
79views Hardware» more  ASPDAC 2004»
14 years 13 days ago
Priority assignment optimization for minimization of current surge in high performance power efficient clock-gated microprocesso
Abstract - We propose an integrated archltectural/physicdplanning approach named priority assignment optimization to mioimize the current surge in high performance power eifkient c...
Yiran Chen, Kaushik Roy, Cheng-Kok Koh
ASAP
2004
IEEE
120views Hardware» more  ASAP 2004»
14 years 13 days ago
Reliability-Aware Co-Synthesis for Embedded Systems
As technology scales, transient faults have emerged as a key challenge for reliable embedded system design. This paper proposes a design methodology that incorporates reliability i...
Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vi...
ASAP
2004
IEEE
140views Hardware» more  ASAP 2004»
14 years 13 days ago
Decimal Floating-Point Division Using Newton-Raphson Iteration
Decreasing feature sizes allow additional functionality to be added to future microprocessors to improve the performance of important application domains. As a result of rapid gro...
Liang-Kai Wang, Michael J. Schulte
ASAP
2004
IEEE
102views Hardware» more  ASAP 2004»
14 years 13 days ago
A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks
The Compaan compiler automatically derives a Process Network (PN) description from an application written in Matlab. The basic element of a PN is a Producer/Consumer (P/C) pair. F...
Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere