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CAV
2004
Springer
121views Hardware» more  CAV 2004»
14 years 13 days ago
CirCUs: A Satisfiability Solver Geared towards Bounded Model Checking
Abstract. CirCUs is a satisfiability solver that works on a combination of AndInverter-Graph, CNF clauses, and BDDs. It has been designed to work well with bounded model checking. ...
HoonSang Jin, Mohammad Awedh, Fabio Somenzi
CAV
2004
Springer
108views Hardware» more  CAV 2004»
14 years 13 days ago
Functional Dependency for Verification Reduction
Abstract. The existence of functional dependency among the state variables of a state transition system was identified as a common cause of inefficient BDD representation in formal...
Jie-Hong Roland Jiang, Robert K. Brayton
CAV
2004
Springer
96views Hardware» more  CAV 2004»
14 years 13 days ago
Verification via Structure Simulation
Neil Immerman, Alexander Moshe Rabinovich, Thomas ...
CAV
2004
Springer
151views Hardware» more  CAV 2004»
14 years 13 days ago
QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
Ganesh Gopalakrishnan, Yue Yang, Hemanthkumar Siva...
CAV
2004
Springer
136views Hardware» more  CAV 2004»
14 years 13 days ago
JNuke: Efficient Dynamic Analysis for Java
JNuke is a framework for verification and model checking of Java programs. It is a novel combination of run-time verification, explicit-state model checking, and counter-example ex...
Cyrille Artho, Viktor Schuppan, Armin Biere, Pasca...
CAV
2004
Springer
154views Hardware» more  CAV 2004»
14 years 13 days ago
Automatic Verification of Sequential Consistency for Unbounded Addresses and Data Values
Sequential consistency is the archetypal correctness condition for the memory protocols of shared-memory multiprocessors. Typically, such protocols are parameterized by the number ...
Jesse D. Bingham, Anne Condon, Alan J. Hu, Shaz Qa...
APCCAS
2006
IEEE
373views Hardware» more  APCCAS 2006»
14 years 13 days ago
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
A new low offset dynamic comparator for high resolution high speed analog-to-digital application has been designed. Inputs are reconfigured from the typical differential pair compa...
Vipul Katyal, Randall L. Geiger, Degang Chen
APCCAS
2006
IEEE
206views Hardware» more  APCCAS 2006»
14 years 13 days ago
On the Properties And Design of Stable IIR Transfer Functions Generated Using Fibonnaci Numbers
This paper considers z-domain transfer functions whose denominator polynomial possesses the property that the coefficient of zi is greater than the coefficient of zi-1 . Such trans...
Christian S. Gargour, Venkat Ramachandran, Ravi P....
APCCAS
2006
IEEE
290views Hardware» more  APCCAS 2006»
14 years 13 days ago
An Improved Soft-Input CAVLC Decoder for Mobile Communication Applications
in this paper, a new CAVLC decoding architecture with a soft-input design concept is proposed. We introduce the soft-decision information to localize the erroneous position at macr...
Tsu-Ming Liu, Chen-Yi Lee
ATVA
2004
Springer
68views Hardware» more  ATVA 2004»
14 years 13 days ago
Theorem Proving Languages for Verification
Jean-Pierre Jouannaud