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ICECCS
2007
IEEE
120views Hardware» more  ICECCS 2007»
14 years 16 days ago
Verifying the CICS File Control API with Z/Eves: An Experiment in the Verified Software Repository
Parts of the CICS transaction processing system were modelled formally in the 1980s in a collaborative project between IBM Hursley Park and Oxford University Computing Laboratory....
Leo Freitas, Konstantinos Mokos, Jim Woodcock
ICECCS
2007
IEEE
92views Hardware» more  ICECCS 2007»
14 years 16 days ago
A first approach to the closed-form specification and analysis of an autonomic control system
Control systems must increasingly be designed to involve collections of hardware and software components, both of which may evolve over the lifetime of the system, and which are e...
Simon Dobson, Eoin Bailey, Stephen Knox, Ross Shan...
ICECCS
2007
IEEE
111views Hardware» more  ICECCS 2007»
14 years 16 days ago
A Refinement Driven Component-Based Design
Modern software applications ranging from enterprise to embedded systems are becoming increasingly complex, and require very high levels of dependability assurance. The most effec...
Zhenbang Chen, Zhiming Liu, Volker Stolz, Lu Yang,...
ICECCS
2007
IEEE
129views Hardware» more  ICECCS 2007»
14 years 16 days ago
Automated Verification of Shape, Size and Bag Properties
In recent years, separation logic has emerged as a contender for formal reasoning of heap-manipulating imperative programs. Recent works have focused on specialised provers that a...
Wei-Ngan Chin, Cristina David, Huu Hai Nguyen, She...
ICCD
2007
IEEE
149views Hardware» more  ICCD 2007»
14 years 17 days ago
A radix-10 SRT divider based on alternative BCD codings
In this paper we present the algorithm and architecture of a radix-10 floating-point divider based on an SRT nonrestoring digit-by-digit algorithm. The algorithm uses conventional...
Álvaro Vázquez, Elisardo Antelo, Pao...
ICCD
2007
IEEE
140views Hardware» more  ICCD 2007»
14 years 17 days ago
Continual hashing for efficient fine-grain state inconsistency detection
Transaction-level modeling (TLM) allows a designer to save functional verification effort during the modular refinement of an SoC by reusing the prior implementation of a module a...
Jae W. Lee, Myron King, Krste Asanovic
ICCD
2007
IEEE
99views Hardware» more  ICCD 2007»
14 years 17 days ago
Power reduction of chip multi-processors using shared resource control cooperating with DVFS
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
Ryo Watanabe, Masaaki Kondo, Hiroshi Nakamura, Tak...
ICCD
2007
IEEE
150views Hardware» more  ICCD 2007»
14 years 17 days ago
CAP: Criticality analysis for power-efficient speculative multithreading
While Speculative Multithreading (SM) on a Chip Multiprocessor (CMP) has the ability to speed-up hard-toparallelize applications, the power inefficiency of aggressive speculation ...
James Tuck, Wei Liu, Josep Torrellas
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
14 years 17 days ago
Power-aware mapping for reconfigurable NoC architectures
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
Mehdi Modarressi, Hamid Sarbazi-Azad