ICCD
2007
IEEE
14 years 17 days ago
2007
IEEE
As application-specific instruction set processors (ASIPs) are being increasingly used in mobile embedded systems, the ubiquitous networking connections have exposed these systems...
ICCD
2007
IEEE
14 years 17 days ago
2007
IEEE
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
ICCD
2007
IEEE
14 years 17 days ago
2007
IEEE
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
ICCD
2007
IEEE
14 years 17 days ago
2007
IEEE
Prior work has shown that collapsible pipelining techniques have the potential to significantly reduce clocking activity, which can consume up to 70% of the dynamic power in moder...
ICCAD
2007
IEEE
14 years 17 days ago
2007
IEEE
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
ICCAD
2007
IEEE
14 years 17 days ago
2007
IEEE
Due to the recent advances in microfluidics, digital microfluidic biochips are expected to revolutionize laboratory procedures. One critical problem for biochip synthesis is the dr...
ICCAD
2007
IEEE
14 years 17 days ago
2007
IEEE
This paper solves the variation-aware on-chip decoupling capacitance (decap) budgeting problem. Unlike previous work assuming the worst-case current load, we develop a novel stocha...
ICCAD
2007
IEEE
2007
IEEE
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors
14 years 17 days ago
Abstract: Polynomial computations over fixed-size bitvectors are found in many practical datapath designs. For efficient RTL synthesis, it is important to identify good decompositi...
ICCAD
2007
IEEE
14 years 17 days ago
2007
IEEE
Abstract-- In this paper, we propose a novel test data compression technique named CacheCompress, which combines selective encoding and dynamic dictionary based encoding. Depending...
ICCAD
2007
IEEE
14 years 17 days ago
2007
IEEE
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...