ISCAS
1994
IEEE
14 years 25 days ago
1994
IEEE
This paper addresses the problem of minimizing the clock period of a circuit by optimizingthe clock skews. We incorporate uncertainty factors and present a formulation that ensure...
ISCAS
1994
IEEE
14 years 25 days ago
1994
IEEE
Abstract-- This paper presents a Synchronous Optical NETwork (SONET) OC-3 155.52 Mb/s limiting amplifier, which is
ISCAS
1994
IEEE
14 years 25 days ago
1994
IEEE
ISCAS
1994
IEEE
14 years 25 days ago
1994
IEEE
ISCAS
1994
IEEE
14 years 25 days ago
1994
IEEE
ISCAS
1994
IEEE
14 years 25 days ago
1994
IEEE
ISCAS
1994
IEEE
14 years 25 days ago
1994
IEEE
ISCA
1994
IEEE
14 years 25 days ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
ISCA
1994
IEEE
14 years 25 days ago
1994
IEEE
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
ISCA
1994
IEEE
14 years 25 days ago
1994
IEEE
Today's commodity microprocessors require a low latency memory system to achieve high sustained performance. The conventional high-performance memory system provides fast dat...