Sciweavers

ISSS
2000
IEEE
94views Hardware» more  ISSS 2000»
14 years 1 months ago
A Transformational Approach to Constraint Relaxation of a Time-driven Simulation Model
Time-driven simulation models typically model timing in an idealized way that is over-constrained and cannot be directly implemented. In this paper we present a transformation to ...
Marek Jersak, Ying Cai, Dirk Ziegenbein, Rolf Erns...
ISSS
2000
IEEE
115views Hardware» more  ISSS 2000»
14 years 1 months ago
Battery-Driven Dynamic Power Management of Portable Systems
Luca Benini, Giuliano Castelli, Alberto Macii, Enr...
ISSS
2000
IEEE
111views Hardware» more  ISSS 2000»
14 years 1 months ago
Systematic Data Reuse Exploration Methodology for Irregular Access Patterns
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption i...
Tanja Van Achteren, Rudy Lauwereins, Francky Catth...
ISQED
2000
IEEE
80views Hardware» more  ISQED 2000»
14 years 1 months ago
A Statistical Model for Electromigration Failures
The lognormal has been traditionally used to model the failure time distribution of electromigration failures. However, when used to estimate the failure of large metal layers, it...
Gilbert Yoh, Farid N. Najm
ISQED
2000
IEEE
117views Hardware» more  ISQED 2000»
14 years 1 months ago
Realistic Worst-Case Modeling by Performance Level Principal Component Analysis
A new algorithm to determine the number and value of realistic worst-case models for the performance of module library components is presented in this paper. The proposed algorith...
Alessandra Nardi, Andrea Neviani, Carlo Guardiani
ISQED
2000
IEEE
91views Hardware» more  ISQED 2000»
14 years 1 months ago
Probabilistic Bottom-Up RTL Power Estimation
We address the problem of power estimation at the register-transfer level (RTL). At this level, the circuit is described in terms of a set of interconnected memory elements and co...
Ricardo Ferreira, A.-M. Trullemans, José C....
ISQED
2000
IEEE
136views Hardware» more  ISQED 2000»
14 years 1 months ago
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits
This paper presents a layout generation tool that aims to reduce the gap between electrical sizing and physical realization of high performance analog circuits. The procedural lay...
Mohamed Dessouky, Marie-Minerve Louërat
ISQED
2000
IEEE
131views Hardware» more  ISQED 2000»
14 years 1 months ago
Low Power Testing of VLSI Circuits: Problems and Solutions
Power and energy consumption of digital systems may increase significantly during testing. This extra power consumption due to test application may give rise to severe hazards to ...
Patrick Girard
ISMVL
2000
IEEE
121views Hardware» more  ISMVL 2000»
14 years 1 months ago
Evolvable Hardware: From On-Chip Circuit Synthesis to Evolvable Space Systems
Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, comments o...
Adrian Stoica