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ICCAD
2003
IEEE
159views Hardware» more  ICCAD 2003»
14 years 2 months ago
Mixed Signal DFT: A Concise Overview
Practical mixed-signal DFT solutions are presented with an emphasis on performance, cost, and test coverage. Special consideration is given to the possible DFT techniques for Phas...
Bozena Kaminska, Karim Arabi
ICCAD
2003
IEEE
97views Hardware» more  ICCAD 2003»
14 years 2 months ago
Iterative Abstraction using SAT-based BMC with Proof Analysis
Aarti Gupta, Malay K. Ganai, Zijiang Yang, Pranav ...
ICCAD
2003
IEEE
141views Hardware» more  ICCAD 2003»
14 years 2 months ago
An Enhanced Multilevel Algorithm for Circuit Placement
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shin...
ICCAD
2003
IEEE
205views Hardware» more  ICCAD 2003»
14 years 2 months ago
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
Aseem Agarwal, David Blaauw, Vladimir Zolotov
FCCM
2003
IEEE
210views VLSI» more  FCCM 2003»
14 years 2 months ago
Compact FPGA-based True and Pseudo Random Number Generators
Two FPGA based implementations of random number generators intended for embedded cryptographic applications are presented. The first is a true random number generator (TRNG) whic...
Kuen Hung Tsoi, K. H. Leung, Philip Heng Wai Leong
FCCM
2003
IEEE
168views VLSI» more  FCCM 2003»
14 years 2 months ago
A Second Generation Embedded Reconfigurable Input Device for Kinetically Challenged Persons
A second generation of an embedded input device for kinetically challenged persons is presented. The new system can detect O(n2 ) free motions in space with O(n) hardware, and has...
Kyprianos Papademetriou, Apostolos Dollas, Stamati...
FCCM
2003
IEEE
185views VLSI» more  FCCM 2003»
14 years 2 months ago
Implementation of a Content-Scanning Module for an Internet Firewall
A module has been implemented in Field Programmable Gate Array (FPGA) hardware that scans the content of Internet packets at Gigabit/second rates. All of the packet processing ope...
James Moscola, John W. Lockwood, Ronald Prescott L...
FCCM
2003
IEEE
133views VLSI» more  FCCM 2003»
14 years 2 months ago
Floating Point Unit Generation and Evaluation for FPGAs
Most commercial and academic floating point libraries for FPGAs provide only a small fraction of all possible floating point units. In contrast, the floating point unit generat...
Jian Liang, Russell Tessier, Oskar Mencer
FCCM
2003
IEEE
123views VLSI» more  FCCM 2003»
14 years 2 months ago
FPGA-based SIMD Processor
A massively parallel single instruction multiple data stream (SIMD) processor designed specifically for cryptographic key search applications is presented. This design aims to ex...
Stanley Y. C. Li, Gap C. K. Cheuk, Kin-Hong Lee, P...