Sciweavers

DATE
2003
IEEE
151views Hardware» more  DATE 2003»
14 years 2 months ago
Analysis and White-Box Modeling of Weakly Nonlinear Time-Varying Circuits
The architectural study of wireless communication systems typically requires simulations with high-level models for different analog and RF blocks. Among these blocks, frequency-t...
Petr Dobrovolný, Gerd Vandersteen, Piet Wam...
DATE
2003
IEEE
114views Hardware» more  DATE 2003»
14 years 2 months ago
Extraction of Piecewise-Linear Analog Circuit Models from Trained Neural Networks Using Hidden Neuron Clustering
This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the l...
Simona Doboli, Gaurav Gothoskar, Alex Doboli
DATE
2003
IEEE
101views Hardware» more  DATE 2003»
14 years 2 months ago
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...
Jingcao Hu, Radu Marculescu
DATE
2003
IEEE
76views Hardware» more  DATE 2003»
14 years 2 months ago
Modeling Noise Transfer Characteristic of Dynamic Logic Gates
Dynamic noise analysis is recently gaining more attention as a definitive method to overcome glaring deficiencies of static noise analysis. Exact dynamic noise analysis requires...
Li Ding 0002, Pinaki Mazumder
DATE
2003
IEEE
109views Hardware» more  DATE 2003»
14 years 2 months ago
A Novel Metric for Interconnect Architecture Performance
We propose a new metric for evaluation of interconnect architectures. This metric is computed by optimal assignment of wires from a given wire length distribution (WLD) to a given...
Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Mud...
DATE
2003
IEEE
103views Hardware» more  DATE 2003»
14 years 2 months ago
Area Fill Generation With Inherent Data Volume Reduction
Control of variability and performance in the back end of the VLSI manufacturing line has become extremely difficult with the introduction of new materials such as copper and low...
Yu Chen, Andrew B. Kahng, Gabriel Robins, Alexande...
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
14 years 2 months ago
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 2 months ago
Cross-Product Functional Coverage Measurement with Temporal Properties-Based Assertions
Temporal specification languages provide an efficient way to express events comprised of complex temporal scenarios. Assertions based on these languages are used to detect viola...
Avi Ziv
DATE
2003
IEEE
109views Hardware» more  DATE 2003»
14 years 2 months ago
Fully Automatic Test Program Generation for Microprocessor Cores
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...