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DATE
2003
IEEE
101views Hardware» more  DATE 2003»
14 years 2 months ago
Energy Estimation for Extensible Processors
This paper presents an efficient methodology for estimating the energy consumption of application programs running on extensible processors. Extensible processors, which are incr...
Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj...
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 2 months ago
PLFire: A Visualization Tool for Asynchronous Phased Logic Designs
We present a visualization tool called PLFire, which allows a user to observe the behavior of a Phased Logic (PL) circuit. Phased logic is a technique for realizing self-timed cir...
Kenneth Fazel, Mitchell A. Thornton, Robert B. Ree...
DATE
2003
IEEE
115views Hardware» more  DATE 2003»
14 years 2 months ago
Control Flow Driven Splitting of Loop Nests at the Source Code Level
This paper presents a novel source code transformation for control flow optimizationcalled loop nest splitting which minimizes the number of executed if-statements in loop nests ...
Heiko Falk, Peter Marwedel
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
14 years 2 months ago
Generalized Posynomial Performance Modeling
This paper presents a new method to automatically generate posynomial symbolic expressions for the performance characteristics of analog integrated circuits. The coefficient set ...
Tom Eeckelaert, Walter Daems, Georges G. E. Gielen...
DATE
2003
IEEE
46views Hardware» more  DATE 2003»
14 years 2 months ago
Combination of Lower Bounds in Exact BDD Minimization
Rüdiger Ebendt, Wolfgang Günther, Rolf D...
DATE
2003
IEEE
96views Hardware» more  DATE 2003»
14 years 2 months ago
Time Domain Multiplexed TAM: Implementation and Comparison
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...
Zahra Sadat Ebadi, André Ivanov
DATE
2003
IEEE
83views Hardware» more  DATE 2003»
14 years 2 months ago
On-Chip Stochastic Communication
Tudor Dumitras, Radu Marculescu
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
14 years 2 months ago
Interactive Ray Tracing on Reconfigurable SIMD MorphoSys
MorphoSys is a reconfigurable SIMD architecture. In this paper, a BSP-based ray tracing is gracefully mapped onto MorphoSys. The mapping highly exploits ray-tracing parallelism. A...
Haitao Du, Marcos Sanchez-Elez, Nozar Tabrizi, Nad...
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
14 years 2 months ago
Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
Nicola Drago, Franco Fummi, Marco Monguzzi, Giovan...
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
14 years 2 months ago
Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated
Reflection and automated introspection of a design in system level design frameworks are seen as necessities for the CAD tools to manipulate the designs within the tools. These f...
Frederic Doucet, Sandeep K. Shukla, Rajesh K. Gupt...