Sciweavers

ICCD
2001
IEEE
154views Hardware» more  ICCD 2001»
14 years 7 months ago
Performance Optimization By Wire and Buffer Sizing Under The Transmission Line Model
As the operating frequency increases to Giga Hertz and the rise time of a signal is less than or comparable to the time-of-flight delay of a line, it is necessary to consider the...
Tai-Chen Chen, Song-Ra Pan, Yao-Wen Chang
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
14 years 7 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
ICCD
2001
IEEE
90views Hardware» more  ICCD 2001»
14 years 7 months ago
Interconnect-centric Array Architectures for Minimum SRAM Access Time
‡ Physical and generic models that analytically couple the array architecture of CMOS SRAMs with the wire lengths and fan-outs along critical paths to decode and sense data are r...
Azeez J. Bhavnagarwala, Stephen V. Kosonocky, Jame...
ICCD
2001
IEEE
98views Hardware» more  ICCD 2001»
14 years 7 months ago
Design Alternatives for Parallel Saturating Multioperand Adders
Parallel saturating multioperand adders significantly improve the performance of GSM speech coders by giving compilers and assembly language programmers the ability to paralleliz...
Pablo I. Balzola, Michael J. Schulte, Jie Ruan, C....
ICCD
2001
IEEE
92views Hardware» more  ICCD 2001»
14 years 7 months ago
Performance Driven Global Routing Through Gradual Refinement
Jiang Hu, Sachin S. Sapatnekar
ICCD
2001
IEEE
103views Hardware» more  ICCD 2001»
14 years 7 months ago
Fixed-outline Floorplanning through Better Local Search
Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Annealing is used, e.g., with the Sequence Pair representation, the typical choice o...
Saurabh N. Adya, Igor L. Markov
ICCD
2001
IEEE
72views Hardware» more  ICCD 2001»
14 years 7 months ago
Linear Time Hierarchical Capacitance Extraction without Multipole Expansion
Saisanthosh Balakrishnan, Jong Hyuk Park, Hyungsuk...