ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
Clock distribution has traditionally been a circuit design problem with negligible micro-architectural impact. However, for clock distribution networks using multiple phase-locked...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
In 1987 Sedlak proposed a modulo multiplication algorithm which is suitable for smart card implementation due to it’s low latency time. It is based on ZDN (zwei_drittel_N) arith...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
We propose two new instructions, swperm and sieve, that can be used to efficiently complete an arbitrary bit-level permutation of an n-bit word with or without repetitions. Permut...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
A novel timing characterization for dual-edge triggered flip-flops is presented in this paper. This characterization takes into account the real overhead taken from the clock cycl...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
The formiila-based I<,JJ model is a figiire of merit for the inductive coirpling, and has been used to solve the simrrltaneoris shield insertion and net ordering (SINO) and sim...