ASPDAC
2012
ACM
12 years 8 months ago
2012
ACM
— Since re-designing and re-optimizing existing logic, memory, and IP blocks in a 3D fashion significantly increases design cost, nearterm three-dimensional integrated circuit (...
CCR
2011
13 years 7 months ago
2011
The most widely used technique for IP geolocation consists in building a database to keep the mapping between IP blocks and a geographic location. Several databases are available ...
RECOSOC
2007
14 years 1 months ago
2007
Electronic equipments with higher performance, lower power consumption, and smaller size motivate the research for more efficient design methods. Platform-based design is a method...
ACSD
2006
IEEE
14 years 2 months ago
2006
IEEE
Reuse of IP blocks has been advocated as a means to conquer the complexity of today's system-on-chip (SoC) designs. Component integration and verification in such systems is ...
DATE
2004
IEEE
14 years 4 months ago
2004
IEEE
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
MSE
1999
IEEE
14 years 4 months ago
1999
IEEE
Intellectual property IP blocks are being created for reuse and marketed as a means of reducing the development time of complex designs. This in turn leads to a reduction in time ...
IWSOC
2003
IEEE
14 years 5 months ago
2003
IEEE
— Intellectual property (IP) block reuse is essential for facilitating the design process of System-on-a-Chip. Sharing IP blocks in such a competitive market poses significant h...
DATE
2005
IEEE
14 years 6 months ago
2005
IEEE
— Sharing IP blocks in today’s competitive market poses significant high security risks. Creators and owners of IP designs want assurances that their content will not be illeg...
SBCCI
2006
ACM
14 years 6 months ago
2006
ACM
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
ISQED
2007
IEEE
14 years 6 months ago
2007
IEEE
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...