Sciweavers

FPL
2006
Springer
91views Hardware» more  FPL 2006»
14 years 4 months ago
Reconfigurable Systems Enabled by a Network-on-Chip
A modern SoC design comprises dozens of dedicated IP cores for specialized tasks and processors for generalpurpose tasks. Flexibility is the key feature of processors, since it is...
Leandro Möller, Ismael Grehs, Ney Calazans, F...
FPL
2006
Springer
95views Hardware» more  FPL 2006»
14 years 4 months ago
Automation of IP Core Interface Generation for Reconfigurable Computing
Pre-designed IP cores for FPGAs represent a huge intellectual and financial wealth that must be leveraged by any high-level tool targeting reconfigurable platforms. In this paper ...
Zhi Guo, Abhishek Mitra, Walid A. Najjar
DDECS
2009
IEEE
146views Hardware» more  DDECS 2009»
14 years 4 months ago
Enhanced LEON3 core for superscalar processing
Low power consumption and high-performance are two main directions in the development of modern microprocessor architectures. In general they are two excluding branches of System-o...
Krzysztof Marcinek, Arkadiusz W. Luczyk, Witold A....
EH
2003
IEEE
135views Hardware» more  EH 2003»
14 years 5 months ago
Towards Evolvable IP Cores for FPGAs
The paper deals with a new approach to the design of adaptive hardware using common Field Programmable Gate Arrays (FPGA). The ultimate aim is to develop evolvable IP (Intellectua...
Lukás Sekanina
FPL
2005
Springer
89views Hardware» more  FPL 2005»
14 years 6 months ago
Snow 2.0 IP Core for Trusted Hardware
Stream ciphers are a promising technique for encryption in trusted hardware. ISO/IEC standardization is currently under way and SNOW 2.0 is one of the remaining candidates. Its sof...
Wenhai Fang, Thomas Johansson, Lambert Spaanenburg