ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
The advent of multicores has introduced new challenges for programmers to provide increased performance and software reliability. There has been significant interest in technique...
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Many multi-core processors employ a large last-level cache (LLC) shared among the multiple cores. Past research has demonstrated that sharing-oblivious cache management policies (...
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Memory scaling is in jeopardy as charge storage and sensing mechanisms become less reliable for prevalent memory technologies, such as DRAM. In contrast, phase change memory (PCM)...
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
ISCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Data prefetching has long been an important technique to amortize the effects of the memory wall, and is likely to remain so in the current era of multi-core systems. Most prefetc...