ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
— This paper presents some circuitry for use within a visual-processing depth-recovery algorithm based upon spike timing. The accuracy of the depth calculation relies on a predic...
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
This paper presents a multilevel (ML) Flash memory onchip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivi...
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
— In this paper we propose a new metric called “effective tunneling capacitance” (Ct eff ) to quantify the transient swing in the gate leakage (gate oxide tunneling) current ...
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
—In the design of a packet-oriented impulse-radio UWB communication system, the main challenge at the receiver is to have a fast synchronization to the coded pulses, along with a...
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
—This paper describes a 12-bit 300 MHz CMOS DAC for high-speed system applications. The proposed DAC consists of a unit current-cell matrix for 8 MSBs and a binaryweighted array ...
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
Abstract— The heterogeneity in the current and future multimedia environment requires an elegant adaptation framework for the production and consumption of different kinds of mul...
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
—A low-latency, HDL-synthesizable dynamic clock frequency controller is presented as a time-efficient alternative to full-custom implementations. Frequency division of a fully in...
ISCAS
2006
IEEE
14 years 7 months ago
2006
IEEE
Abstract— This paper introduces a novel four-order system, which can generate one-directional (1-D) n−torus, twodirectional (2-D) n × m −torus, three-directional (3-D) n × ...