ICCAD
2009
IEEE
13 years 10 months ago
2009
IEEE
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
ICCAD
1998
IEEE
14 years 4 months ago
1998
IEEE
In this paper, we propose a new logic synthesis methodology to deal with the increasing importance of the interconnect delay in deepsubmicron technologies. We first show that conv...
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
The ultimate goal of logic synthesis is to explore implementation flexibility toward meeting design targets, such as area, power, and delay. Traditionally, such flexibility is exp...