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DAC
2012
ACM
12 years 1 months ago
Run-time power-down strategies for real-time SDRAM memory controllers
Powering down SDRAMs at run-time reduces memory energy consumption significantly, but often at the cost of performance. If employed speculatively with real-time memory controller...
Karthik Chandrasekar 0001, Benny Akesson, Kees Goo...
ISCA
2011
IEEE
258views Hardware» more  ISCA 2011»
13 years 3 months ago
A case for heterogeneous on-chip interconnects for CMPs
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
IPPS
2010
IEEE
13 years 9 months ago
Analyzing the trade-off between multiple memory controllers and memory channels on multi-core processor performance
Increasing the core-count on current and future processors is posing critical challenges to the memory subsystem to efficiently handle concurrent memory requests. The current tren...
José Carlos Sancho, Michael Lang 0003, Darr...