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ASYNC
2004
IEEE
78views Hardware» more  ASYNC 2004»
13 years 11 months ago
Hiding Synchronization Delays in a GALS Processor Microarchitecture
We analyze an Alpha 21264-like Globally
Greg Semeraro, David H. Albonesi, Grigorios Magkli...
IEEEPACT
2002
IEEE
14 years 10 days ago
Application Transformations for Energy and Performance-Aware Device Management
Energy conservation without performance degradation is an important goal for battery-operated computers, such as laptops and hand-held assistants. In this paper we determine the p...
Taliver Heath, Eduardo Pinheiro, Jerry Hom, Ulrich...
DSN
2002
IEEE
14 years 11 days ago
Ditto Processor
Concentration of design effort for current single-chip Commercial-Off-The-Shelf (COTS) microprocessors has been directed towards performance. Reliability has not been the primary ...
Shih-Chang Lai, Shih-Lien Lu, Jih-Kwon Peir
SENSYS
2003
ACM
14 years 20 days ago
On the effect of localization errors on geographic face routing in sensor networks
In the absence of location errors, geographic routing - using a combination of greedy forwarding and face routing - has been shown to work correctly and efficiently. The effects o...
Karim Seada, Ahmed Helmy, Ramesh Govindan
DISCEX
2003
IEEE
14 years 21 days ago
Interactions Between TCP and the IEEE 802.11 MAC Protocol
The IEEE 802.11x MAC protocol, the de facto standard for wireless LANs, includes a distributed coordination function (DCF) mode usable for ad hoc network architectures. The Transm...
Rui Jiang, Vikram Gupta, Chinya V. Ravishankar
CIKM
2004
Springer
14 years 25 days ago
Indexing text data under space constraints
An important class of queries is the LIKE predicate in SQL. In the absence of an index, LIKE queries are subject to performance degradation. The notion of indexing on substrings (...
Bijit Hore, Hakan Hacigümüs, Balakrishna...
ASPDAC
2004
ACM
75views Hardware» more  ASPDAC 2004»
14 years 26 days ago
Power-performance trade-off using pipeline delays
— We study the delays faced by instructions in the pipeline of a superscalar processor and its impact on power and performance. Instructions that are ready-on-dispatch (ROD) are ...
G. Surendra, Subhasis Banerjee, S. K. Nandy
AVBPA
2005
Springer
256views Biometrics» more  AVBPA 2005»
14 years 29 days ago
Modification of Intersession Variability in On-Line Signature Verifier
For Pen-input on-line signature verification algorithms, the influence of intersession variability is a considerable problem because hand-written signatures change with time, causi...
Yasunori Hongo, Daigo Muramatsu, Takashi Matsumoto
ISCA
2005
IEEE
104views Hardware» more  ISCA 2005»
14 years 1 months ago
Opportunistic Transient-Fault Detection
CMOS scaling increases susceptibility of microprocessors to transient faults. Most current proposals for transient-fault detection use full redundancy to achieve perfect coverage ...
Mohamed A. Gomaa, T. N. Vijaykumar
DFT
2005
IEEE
126views VLSI» more  DFT 2005»
14 years 1 months ago
Analysis and Testing for Error Tolerant Motion Estimation
We propose a novel system-level error tolerance approach specifically targeted for multimedia compression algorithms. In particular we focus on the motion estimation process perf...
Hyukjune Chung, Antonio Ortega