Sciweavers

ITCC
2005
IEEE
14 years 5 months ago
On the Masking Countermeasure and Higher-Order Power Analysis Attacks
Abstract— Masking is a general method used to thwart Differential Power Analysis, in which all the intermediate data inside an implementation are XORed with random Boolean values...
François-Xavier Standaert, Eric Peeters, Je...
ISVLSI
2005
IEEE
115views VLSI» more  ISVLSI 2005»
14 years 5 months ago
High Speed Max-Log-MAP Turbo SISO Decoder Implementation Using Branch Metric Normalization
The authors present a turbo soft-in soft-out (SISO) decoder based on Max-Log maximum a posteriori (ML-MAP) algorithm implemented with sliding window (SW) method. A novel technique...
J. H. Han, Ahmet T. Erdogan, Tughrul Arslan
ISVLSI
2005
IEEE
113views VLSI» more  ISVLSI 2005»
14 years 5 months ago
Balancing System Level Pipelines with Stage Voltage Scaling
This paper presents an approach to dynamically balance the pipeline by scaling the stage supply voltages. Simulation results show that by such an approach about 50% improvement in...
Hui Guo, Sri Parameswaran
ISCAS
2005
IEEE
144views Hardware» more  ISCAS 2005»
14 years 5 months ago
Impact of multicycled scheduling on power-area tradeoffs in behavioural synthesis
— Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the...
M. A. Ochoa-Montiel, Bashir M. Al-Hashimi, Peter K...
ISCAS
2005
IEEE
119views Hardware» more  ISCAS 2005»
14 years 5 months ago
Analysis of power consumption in VLSI global interconnects
Abstract— The analysis of effects induced by interconnects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the t...
Youngsoo Shin, Hyung-Ock Kim
IPPS
2005
IEEE
14 years 5 months ago
Scheduling Processor Voltage and Frequency in Server and Cluster Systems
Modern server farm and cluster sites consume large quantities of energy both to power and cool the machines in the site. At the same time, less power supply redundancy is offered ...
Ramakrishna Kotla, Soraya Ghiasi, Tom W. Keller, F...
IPPS
2005
IEEE
14 years 5 months ago
Power and Energy Profiling of Scientific Applications on Distributed Systems
Power consumption is a troublesome design constraint for emergent systems such as IBM’s BlueGene /L. If current trends continue, future petaflop systems will require 100 megawat...
Xizhou Feng, Rong Ge, Kirk W. Cameron
IPPS
2005
IEEE
14 years 5 months ago
Reducing Power with Performance Constraints for Parallel Sparse Applications
Sparse and irregular computations constitute a large fraction of applications in the data-intensive scientific domain. While every effort is made to balance the computational wor...
Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir...
HPCA
2005
IEEE
14 years 5 months ago
Exploring the Design Space of Power-Aware Opto-Electronic Networked Systems
As microprocessors become increasingly interconnected, the power consumed by the interconnection network can no longer be ignored. Moreover, with demand for link bandwidth increas...
Xuning Chen, Li-Shiuan Peh, Gu-Yeon Wei, Yue-Kai H...
DATE
2005
IEEE
108views Hardware» more  DATE 2005»
14 years 5 months ago
A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik